Product Summary
The TMS320TCI100GLZ is a highest-performance fixed-point DSP. The TMS320TCI100GLZ is based on the second-generation high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture (VelociTI.2.) developed by Texas Instruments (TI), making these DSPs an excellent choice for wireless infrastructure applications. The TMS320TCI100GLZ is a code-compatible member of the C6000 DSP platform.
Parametrics
TMS320TCI100GLZ absolute maximum ratings: (1)Supply voltage ranges: CVDD (see Note 1): -0.5 V to 1.5 V; (2)DVDD (see Note 1): -0.5 V to 4.4 V; (3)Input voltage ranges: (except PCI), VI: -0.5 V to 4.4 V; (4)(PCI), VIP: -0.5 V to DVDD + 0.5 V; (5)Output voltage ranges: (except PCI), VO: -0.5 V to 4.4 V; (6)(PCI), VOP: -0.5 V to DVDD + 0.5 V; (7)Operating case temperature ranges, TC: (default): 0℃ to 90℃; (8)(A version) [A-600 and A-720 devices]: -40℃ to 105℃; (9)Storage temperature range, Tstg: -65℃ to 150℃.
Features
TMS320TCI100GLZ features: (1)Highest-Performance Fixed-Point Digital Signal Processors (DSPs); (2)VelociTI.2. Extensions to VelociTI Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x. DSP Core; (3)Instruction Set Features; (4)VCP; (5)TCP; (6)L1/L2 Memory Architecture; (7)Two External Memory Interfaces (EMIFs); (8)Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels); (9)Host-Port Interface (HPI): User-Configurable Bus Width (32-/16-Bit); (10)32-Bit/33-MHz, 3.3-V PCI Master/Slave Interface Conforms to PCI Specification 2.2; (11)Three Multi-channel Buffered Serial Ports; (12)Three 32-Bit General-Purpose Timers; (13)UTOPIA; (14)Sixteen General-Purpose I/O (GPIO) Pins; (15)Flexible PLL Clock Generator; (16)IEEE-1149.1 (JTAG Boundary-Scan-Compatible; (17)532-Pin Ball Grid Array (BGA) Package (GLZ, ZLZ, CLZ Suffixes), 0.8-mm Ball Pitch; (18)0.09-μm/7-Level Cu Metal Process (CMOS); (19)3.3-V I/Os, 1.1-V Internal (600 MHz); (20)3.3-V I/Os, 1.2-V Internal (720 MHz).
Diagrams
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