WJLXT386LE

Product Summary

The WJLXT386LE is a quad short haul Pulse Code Modulation (PCM) transceiver for use in both 1.544 Mbps (T1) and 2.048 Mbps (E1) applications. It incorporates four independent receivers and four independent transmitters in a single PBGA-160 or LQFP-100 package. The WJLXT386LE can be configured as a 3 channel transceiver with G.772 compliant non intrusive protected monitoring points. It uses a single 3.3V supply for low power consumption. The applications of the WJLXT386LE include SONET/SDH tributary interfaces, Digital cross connects, Public/private switching trunk line interfaces, Microwave transmission systems, M13, E1-E3 MUX.

Parametrics

WJLXT386LE absolute maximum ratings: (1)DC supply voltage Vcc: -0.5 to 4.0V; (2)DC supply voltage Tvcc 0-3: -0.5 to 7.0 V; (3)Input voltage on any digital pin Vin: GND-0.5 to 5.5 V; (4)Input voltage on RTIP, RRING1 Vin: GND-0.5 to VCC + 0.5; (5)ESD voltage on any Pin 2 Vin: 2000V; (6)Transient latch-up current on any pin Iin: 100mA; (7)Input current on any digital pin 3 Iin: -10 to 10mA; (8)DC input current on TTIP, TRING 3 Iin: ±100mA; (9)DC input current on RTIP, RRING 3 Iin: ±100mA; (10)Storage temperature Tstor: -65 to +150℃; (11)Maximum power dissipation in package PP: 830mW; (12)Case Temperature, 100 pin LQFP; (13)package Tcase :120℃; (14)Case Temperature, 160 pin PBGA package Tcase: 120℃.v

Features

WJLXT386LE features: (1)Single rail 3.3V supply with 5V tolerant inputs; (2)Low power consumption of 150mW per channel (typical); (3)Superior crystal-less jitter attenuator; (4)Meets ETSI CTR12/13, ITU G.736, G.742, G.823 and AT&T Pub 62411 specifications; (5)Optimized for SONET/SDH applications, meets ITU G.783 mapping jitter specification; (6)Constant throughput delay jitter attenuator; (7)Hitless Protection Switching (HPS) for 1 to 1 protection without relays; (8)HDB3, B8ZS, or AMI line encoder/decoder; (9)Provides protected monitoring points per ITU G.772; (10)Analog/digital and remote loopback testing functions; (11)LOS per ITU G.775, ETS 300 233 and T1.231; (12)8 bit parallel or 4 wire serial control interface; (13)Hardware and Software control modes; (14)JTAG Boundary Scan test port per IEEE 1149.1; (15)160 PBGA and 100 pin LQFP packages.

Diagrams