Product Summary

The TN80C251TB24 is a high-performance CHMOS microcontroller. A member of the Intel family of 8-bit MCS 251 microcontrollers, the TN80C251TB24 is binary-code compatible with MCS 51 microcontrollers and pin compatible with 40-pin PDIP and 44-pin PLCC MCS 51 microcontrollers. The TN80C251TB24 features an enriched instruction set, linear addressing, and efficient C-language support. The TN80C251TB24 has 512 bytes or 1Kbyte of on-chip RAM and is available with 8 Kbytes or 16 Kbytes of on-chip ROM, or without ROM. A variety of features can be selected by new user-programmable configurations.

Parametrics

TN80C251TB24 absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Voltage: EA# Pin with respect to VSS: 0V to +13.0V; (3)Voltage: Any other Pin with respect to VSS: -0.5V to +6.5V; (4)IOL per I/O Pin: 15mA; (5)Power Dissipation: 1.5W.

Features

TN80C251TB24 features: (1)Real-time and Programmed Wait State Bus Operation; (2)Binary-code Compatible with MCS 51; (3)Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets; (4)Register-based MCS 251 Architecture; (5)Enriched MCS 51 Instruction Set; (6)Linear Addressing; (7)256-Kbyte Expanded External Code/Data Memory Space; (8)ROM Options: 16 Kbytes or without ROM; (9)16-bit Internal Code Fetch; (10)64-Kbyte Extended Stack Space; (11)On-chip Data RAM Options: 512-Byte; (12)8-bit, 2-clock External Code Fetch in Page Mode; (13)Fast MCS 251 Instruction Pipeline; (14)User-selectable Configurations; (15)32 Programmable I/O Lines; (16)Eight Maskable Interrupt Sources with Four Programmable Priority Levels; (17)Three Flexible 16-bit Timer/counters; (18)Hardware Watchdog Timer; (19)Programmable Counter Array; (20)Two Programmable Serial I/O Ports; (21)High-performance CHMOS Technology; (22)Static Standby to 24-MHz Operation; (23)Complete System Development Support; (24)Package Options (PDIP and PLCC).

Diagrams

TN80C251TB24 block diagram

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