SAB-C167CR-16RM

SAB-C167CR-16RM, 16-Bit, CMOS Single-Chip Microcontroller, QFP, 100mA, 1.5W, -0.5V to +6.5V

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Price:: US $8.00~30.00 / piece [Get Latest Price]

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PartNumber:: SAB-C167CR-16RM

Brand:: Infineon Technologies AG - Infineon | Pack: QFP | D/C: 00+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-12-10

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Part Number:SAB-C167CR-16RM
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Product Summary

The SAB-C167CR-16RM is a new derivative of the Siemens C16x Family of full featured single-chip CMOS microcontrollers. It combines high CPU performance (up to 10 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. SAB-C167CR-16RM also provides on-chip high-speed RAM and clock generation via PLL.

Parametrics

SAB-C167CR-16RM absolute maximum ratings: (1)Ambient temperature under bias (TA): 0 to + 70 ℃; (2)Storage temperature (TST): - 65 to + 150 ℃; (3)Voltage on VCC pins with respect to ground (VSS): - 0.5 to + 6.5 V; (4) Voltage on any pin with respect to ground (VSS): - 0.5 to VCC + 0.5 V; (5) Input current on any pin during overload condition: - 10 to + 10mA; (6) Absolute sum of all input currents during overload condition: 100mA; (7) Power dissipation: 1.5 W.

Features

SAB-C167CR-16RM features: (1)High Performance 16-bit CPU with 4-Stage Pipeline; (2)100 ns Instruction Cycle Time at 20 MHz CPU Clock; (3)500 ns Multiplication (16x16 bit), 1 ms Division (32 / 16 bit); (4)Enhanced Boolean Bit Manipulation Facilities; (5)Additional Instructions to Support HLL and Operating Systems; (6)Register-Based Design with Multiple Variable Register Banks; (7)Single-Cycle Context Switching Support; (8)Clock Generation via on-chip PLL or via direct clock input; (9)Up to 16MBytes Linear Address Space for Code and Data; (10)2KBytes On-Chip Internal RAM (IRAM); (11)2KBytes On-Chip Extension RAM (XRAM); (12)Programmable External Bus Characteristics for Different Address Ranges; (13)8-Bit or 16-Bit External Data Bus; (14)Multiplexed or Demultiplexed External Address/Data Buses; (15)Five Programmable Chip-Select Signals; (16)Hold- and Hold-Acknowledge Bus Arbitration Support; (17)1024 Bytes On-Chip Special Function Register Areal On-Chip Bootstrap Loader; (18)144-Pin MQFP Package (EIAJ); (19)Idle and Power Down Modes.