CY7C53120L8-32SXI

Product Summary

The CY7C53120L8-32SXI is a 3.3V Neuron Chip Network Processor with a number of feature enhancements. The CY7C53120L8-32SXI Neuron chip implements a device for LonWorks distributed intelligent control networks. It incorporates, on a single chip, the necessary communication and control functions, both in hardware and firmware that facilitate the design of a LonWorks device. The CY7C53120L8-32SXI contains a very flexible five-pin communication port that can be configured to interface with a wide variety of media transceivers at a wide range of data rates. The communication port can operate at either 3.3V or 5V. In 5V mode the communication port is completely backward compatible with existing 5V transceivers. The most common transceiver types are twisted-pair, powerline, RF, IR, fiber-optics, and coaxial.

Parametrics

CY7C53120L8-32SXI absolute maximum ratings: (1)Receiver Common Mode Voltage Range to maintain hysteresis: 1.2V to VDD–2.2 V; (2)Receiver Common Mode Range to operate with unspecified hysteresis 0.9 VDD: 1.75V; (3)Input Offset Voltage: -0.05Vhys–35 to 0.05Vhys + 35 mV; (4)Propagation Delay (F = 0, VID = Vhys/2 + 200 mV): 230ns; (5)Input Resistance: 5MΩ; (6)Wake-up Time: 10μs; (7)Differential Output Impedance for CP2 and CP3: 35Ω.

Features

CY7C53120L8-32SXI features: (1)3.3V operation; (2)Three 8-bit pipelined processors for concurrent processing of application code and network traffic; (3)Hardware UART/SPI interface; (4)Eleven-pin I/O port programmable in 38 modes for fast application program development. I/O port is 5V input tolerant; (5)Two 16-bit timer/counters for measuring and generating I/O device waveforms; (6)Five-pin communication port that supports direct connect and network transceiver interfaces, and operates at 3.3V or 5V; (7)Programmable pull-ups on IO4-IO7 and 20mA sink current on IO0-O3; (8)Unique 48-bit Neuron ID number in every device to facilitate network installation and management; (9)0.35μm Flash process technology; (10)On-chip LVD circuit with programmable trip point and digital filter settings; (11)Programmable Pulse Stretching reset; (12)4,096 bytes of SRAM for buffering network data, system, and application data storage; (13)2.75KBytes (CY7C53150L), 8KBytes (CY7C53120L8) of Flash memory with on-chip charge pump for flexible storage of configuration data and application code; (14)Addresses up to 56KBytes of external memory (CY7C53150L); (15)16KBytes (CY7C53120L8) of ROM containing LonTalk. network protocol firmware; (16)Maximum input clock operation of 20MHz over -40℃ to 85℃ temperature range; (17)64-pin TQFP package (CY7C53150L); (18)32-pin SOIC or 44-pin TQFP package (CY7C53120L8).

Diagrams