Product Summary

The CY7C185-35PC is a high-performance CMOS static RAM. It is organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state drivers. The CY7C185-35PC has an automatic power-down feature (CE1 or CE2), reducing the power consumption by 70% when deselected. The CY7C185-35PC is in a standard 300-mil-wide DIP, SOJ, or SOIC package. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. A die coat is used to insure alpha immunity.

Parametrics

CY7C185-35PC absolute maximum ratings: (1)Storage Temperature: –65 to +150℃; (2)Ambient Temperature with Power Applied: –55 to +125℃; (3)Supply Voltage to Ground Potential: –0.5V to +7.0V; (4)DC Voltage Applied to Outputs in High Z State: –0.5V to +7.0V; (5)DC Input Voltage: –0.5V to +7.0V; (6)Output Current into Outputs (LOW): 20mA; (7)Static Discharge Voltage: >2001V (per MIL-STD-883, Method 3015); (8)Latch-Up Current: >200 mA.

Features

CY7C185-35PC features: (1)High speed: 15 ns; (2)Fast tDOE; (3)Low active power: 715mW; (4)Low standby power: 220 mW; (5)CMOS for optimum speed/power; (6)Easy memory expansion with CE1, CE2, and OE features; (7)TTL-compatible inputs and outputs; (8)Automatic power-down when deselected.

Diagrams

CY7C185-35PC block diagram

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