CY37064P100-125AXC

CY37064P100-125AXC, CMOS CPLD, QFP, -0.5V to +7.0V, 16mA, Cypress Semiconductor

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PartNumber:: CY37064P100-125AXC

Brand:: Cypress Semiconductor - Cypress | Pack: QFP | D/C: 08+

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Products Upload time: 2012-12-11

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Part Number:CY37064P100-125AXC
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Product Summary

The CY37064P100-125AXC is a CMOS CPLD. It provides a range of high-density programmable logic solutions with unparalleled system performance. The CY37064P100-125AXC is designed to bring the flexibility, ease of use, and performance of the 22V10 to high-density CPLDs. The architecture is based on a number of logic blocks that are connected by a Programmable Interconnect Matrix (PIM). Each logic block features its own product term array, product term allocator, and 16 macrocells. The PIM distributes signals from the logic block outputs and all input pins to the logic block inputs. The CY37064P100-125AXC is electrically erasable and In-System Reprogrammable (ISR), which simplifies both design and manufacturing flows, thereby reducing costs.

Parametrics

CY37064P100-125AXC absolute maximum ratings: (1)Storage Temperature:–65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Supply Voltage to Ground Potential:–0.5V to +7.0V; (4)DC Voltage Applied to Outputs; (5)in High-Z State: –0.5V to +7.0V; (6)DC Input Voltage:–0.5V to +7.0V; (7)DC Program Voltage: 4.5 to 5.5V; (8)Current into Outputs: 16mA; (9)Static Discharge Voltage: ＞2001V (per MIL-STD-883, Method 3015); (10)Latch-up Current: ＞200 mA.

Features

CY37064P100-125AXC features: (1)In-System Reprogrammable (ISR) CMOS CPLDs; (2)High density; (3)Simple timing model; (4)3.3V and 5V versions; (5)PCI-compatible[1]; (6)Programmable bus-hold capabilities on all I/Os; (7)Intelligent product term allocator provides; (8)Flexible clocking; (9)Consistent package/pinout offering across all densities; (10)44 to 400 leads in PLCC, CLCC, PQFP, TQFP, CQFP, BGA, and Fine-Pitch BGA packages; (11)Lead(Pb)-free packages available.