AD9777BSV

Dual TxDAC+ D/A Converter, 16BIT, 160MSPS, 80TQFP, 2 MHz to 35 MHz, -0.3 to +4.0 V

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Price:: US $5.00~8.00 / piece [Get Latest Price]

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PartNumber:: AD9777BSV

Brand:: Analog Devices - ADI | Pack: QFP | D/C: 05+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-11-30

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Product Summary

The AD9777BSV is an Interpolating Dual TxDAC+ D/A Converter. It provides a high level of programmability, thus allowing for enhanced system level options. The AD9777BSV features the ability to perform fS/2, fS/4, and fS/8 digital modulation and image rejection when combined with an analog quadrature modulator. The applications of the AD9777BSV include: Communications, Analog quadrature modulation architecture, 3G, multicarrier GSM, TDMA, CDMA systems, Broadband wireless, point-to-point microwave radios, Instrumentation/ATE.

Parametrics

AD9777BSV absolute maximum ratings: (1)AVDD, DVDD, CLKVDD: -0.3 to +4.0 V; (2)AVDD, DVDD, CLKVDD: -4.0 to +4.0 V; (3)AGND, DGND, CLKGND: -0.3 TO +0.3 V; (4)REFIO, FSADJ1/FSADJ2: -0.3 to AVDD + 0.3 V; (5)IOUTA, IOUTB: -1.0 to AVDD + 0.3 V; (6)P1B15 to P1B0, P2B15 to P2B0, RESET: -0.3 to DVDD + 0.3 V; (7)DATACLK/PLL_LOCK: -0.3 to DVDD + 0.3 V; (8)CLK+, CLK-: -0.3 to CLKVDD + 0.3 V; (9)LPF: -0.3 to CLKVDD + 0.3 V; (10)SPI_CSB, SPI_CLK, SPI_SDIO, SPI_SDO: -0.3 to DVDD + 0.3 V; (11)Junction Temperature: 125 ℃; (12)Storage Temperature: -65 to +150 ℃; (13)Lead Temperature (10 sec): 300 ℃.

Features

AD9777BSV features: (1)16-bit resolution, 160 MSPS/400 MSPS input/output data rate; (2)Selectable 2×/4×/8× interpolating filter; (3)Programmable channel gain and offset adjustment; (4)fS/4, fS/8 digital quadrature modulation capability; (5)Direct IF transmission mode for 70 MHz + IFs; (6)Enables image rejection architecture; (7)Fully compatible SPI port; (8)Excellent ac performance: SFDR -73 dBc @ 2 MHz to 35 MHz; WCDMA ACPR 71 dB @ IF = 19.2 MHz; (9)Internal PLL clock multiplier; (10)Selectable internal clock divider; (11)Versatile clock input.