CY7C1380F-167BZI

18-Mbit, Pipelined SRAM, 250 MHz, 3.3V, BGA, CY7C1380F-167BZI

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Price:: US $1.00~3.00 / piece [Get Latest Price]

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Qty (lots)	Price/lot
1 ~ 100 :	3.00 / Piece
101 ~ 500 :	2.00 / Piece
501 ~ 1000 :	1.00 / Piece

PartNumber:: CY7C1380F-167BZI

Brand:: Cypress Semiconductor - Cypress | Pack: BGA | D/C: 07+

Availability:: Supply Ability: 200/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Total Price:: US $0

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Products Upload time: 2012-12-25

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Part Number:CY7C1380F-167BZI
US $1.00 - 3.00
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piece

Product Summary

The CY7C1380F-167BZI is a 18-Mbit Pipelined SRAM. The CY7C1380F-167BZI integrates 524,288 x 36 and 1,048,576 x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). The CY7C1380F-167BZI inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE3 [2]), Burst Control inputs (ADSC, ADSP, and ADV), Write Enables (BWX, and BWE), and Global Write (GW). Asynchronous inputs include the Output Enable (OE) and the ZZ pin.

Parametrics

CY7C1380F-167BZI absolute maximum ratings: (1)Storage Temperature: –65℃ to +150℃; (2)Ambient Temperature with Power Applied: –55℃ to +125℃; (3)Supply Voltage on VDD Relative to GND: –0.3V to +4.6V; (4)DC Voltage Applied to Outputs in Tri-State: –0.5V to VDDQ + 0.5V; (5)DC Input Voltage: –0.5V to VDD + 0.5V.

Features

CY7C1380F-167BZI features: (1)Supports bus operation up to 250 MHz; (2)Available speed grades are 250, 200 and 167 MHz; (3)Registered inputs and outputs for pipelined operation; (4)3.3V core power supply; (5)2.5V / 3.3V I/O operation; (6)Fast clock-to-output times; (7)Provide high-performance 3-1-1-1 access rate; (8)User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences; (9)Separate processor and controller address strobes; (10)Synchronous self-timed writes; (11)Asynchronous output enable; (12)Single Cycle Chip Deselect; (13)Offered in JEDEC-standard lead-free 100-pin TQFP, 119-ball BGA and 165-Ball fBGA packages.